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Hot-Swap Interface
The signals in Table 5-7 are used to implement the interface between the CorePCIF hardware connection process and
the external physical connection process, as described in the PICMG 2.1 R2.0 Compact PCI Hot-Swap specification.
These signals only function when the HOT_SWAP_ENABLE parameter is set.
Table 5-7 · Hot-Swap Interface Signals
Name
HS_BDSELN
HS_SWITCHN
HS_POWGOODN
HS_POWFAILN
HS_ENUMN
HS_LEDN
HS_HEALTHYN
50
Type
Input
Input
Input
Input
Output
(OC)
Output
Output
Width
1
1
1
1
1
1
1
Description
Active low signal indicating that the board is selected and all other pins are fully connected.
This input should be synchronous to the PCI clock.
Active low signal from the board ejector switch. This input should be synchronous to the PCI
clock and debounced outside the core.
Active low signal indicating that the power supply is within specification. This input should
be synchronous to the PCI clock.
Active low signal indicating that the power supply is outside specification or a fault has
occurred. This input should be synchronous to the PCI clock.
Active low signal notifying the system host that the board either has been inserted or is about
to be extracted. This is an open-collector output and must be directly connected to an FPGA
I/O pin.
Active low signal to drive the external blue LED
Active low signal indicating that the board is healthy and may be released from reset and
allowed onto the PCI bus
v4.0
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